- Move cpu_detect to absl::base_internal, adding the kNvidiaGrace and kIntelGraniterapids enums.
- On aarch64 Linux, implement custom ISAR0.RNDR checking logic to distinguish kArmNeoverseV2 from kNvidiaGrace.
- Add IsSMTEnabled and NumContextsPerCPU
PiperOrigin-RevId: 922862384
Change-Id: I038b7732714400d6c63ff309bf20af3f436afcf5
absl::variant, and related types
The corresponding headers are removed from cc files, but kept in
headers to prevent breakages from transitive dependencies.
PiperOrigin-RevId: 872421685
Change-Id: I867d4c3f7c9e422289c63816d44719b0530fb0a6
With a newer clang, we can use __builtin_cpu_supports which caches all
the feature bits.
If we are using an older clang, we fall back to querying sysctlbyname
for the relevant processor features.
PiperOrigin-RevId: 715153229
Change-Id: I570fa349f96829d5da3b32c928480ddf67176cad
Note that this only changes how we allocate the empty state, and reference countings of `empty` stay the same.
PiperOrigin-RevId: 599526339
Change-Id: I2c6aaf875c144c947e17fe8f69692b1195b55dd7
This CL rolls forward a previous change which we rolled back temporarily due to
compilation errors on x86 when PCLMUL intrinsics were unavailable.
*** Original change description ***
This change replaces inline x86 intrinsics with generic versions that compile
for both x86 and ARM depending on the target arch.
This change does not enable the accelerated crc memcpy engine on ARM. That will
be done in a subsequent change after the optimal number of vector and integer
regions for different CPUs is determined.
***
PiperOrigin-RevId: 563416413
Change-Id: Iee630a15ed83c26659adb0e8a03d3f3d3a46d688
In some configurations this change causes compilation errors. We will roll this
forward again after those issue are addressed.
PiperOrigin-RevId: 562810916
Change-Id: I45b2a8d456273e9eff188f36da8f11323c4dfe66
This change replaces inline x86 intrinsics with generic versions that compile
for both x86 and ARM depending on the target arch.
This change does not enable the accelerated crc memcpy engine on ARM. That will
be done in a subsequent change after the optimal number of vector and integer
regions for different CPUs is determined.
PiperOrigin-RevId: 562785420
Change-Id: I8ba4aa8de17587cedd92532f03767059a481f159
This implementation can advantage of hardware acceleration available
on common CPUs when using GCC and Clang. A future update may enable
this on MSVC as well.
PiperOrigin-RevId: 487327024
Change-Id: I99a8f1bcbdf25297e776537e23bd0a902e0818a1
